Our Range of Services to Support Your Success
- Processes and process chains for heterogeneous integration, in particular:
- Development and optimization of unit processes, including the integration of new materials
- Technology modules for encapsulation using wafer and chip bonding or parylene-based approaches, including contacting systems
- Development of packaging and interconnection technologies for integration at the system level
- Fabrication of functional prototypes, demonstrators, and small batches
Our Core Competencies to Help You Overcome Your Challenges
- Interconnect technologies for heterogeneous integration (TSV), power packaging, and bonding processes (wafer-to-wafer, chip-to-wafer, etc.)
- Deposition processes on 150 mm and 200 mm substrates at the chip, component, and wafer levels, and surface processing (e.g., screen printing of glass-frit pastes, screen/stencil printing of sinter pastes) for 2D and 3D substrates
- Highly conformal parylene deposition for adhesive wafer bonding (up to 300 mm) as well as the development of ultra-thin parylene circuit boards
- Surface-activated bonding of heterogeneous materials such as LiTaO3, SiC, and lead-free glass-frit bonding below 400 °C, including characterization of the bond interfaces
- Hybrid assemblies (wafer/chiplet) for highly integrated ICs or for 3D integration
- Additive deposition technologies and parylene-based packaging
- ECD from aqueous solutions (Cu, Ni, NiFe, Sn, Au, SnAg) and ionic liquids – Al for bumps, bond frames, and redistribution
Our Research Topics for Future Innovations
- Development of additive printing processes for packaging on 2D/3D substrates using dispensing, jetting, and extrusion methods
- Investigation and application of screen-printing technologies for glass-frit intermediate layers and sinter pastes on 2D substrates and wafers
- Investigation of 3D printing methods for nano- and micro-optics using two-photon polymerization (2PP)
- Research, design, and fabrication of (free-standing) parylene layers and their applications (circuit carriers, waveguides, adhesion layers, microfluidics)
- Development of micro-transfer printing and associated process chains for chiplet integration (advanced packaging)
- Application-specific developments for permanent and temporary wafer-bonding technologies, e.g., direct, hybrid, and adhesive bonding (e.g., parylene up to 300 mm or oxide-free wafer bonding in high-vacuum)
- Hybrid bonding for high-density 3D integration
- Inductive heating / selective joining and sintering on chip, wafer and substrate level
- Selective joining with integrated reactive multilayers for MOEMS and MEMS
- Electrochemical deposition (ECD) of aluminum and standard materials for packaging and interconnection technologies, 3D integration (TSV), and redistribution layer (RDL)
- Process development of joining techniques with cryogenic concepts specifically for quantum technologies
- Optoelectronic packaging
- Die-to-wafer (D2W) bonding
Fraunhofer Institute for Electronic Nano Systems