Key Challenges

More than 90 % of semiconductor packaging, assembly and testing is done outside Europe

The increase in complexity of electronic systems and to System-in-Package (SiP) solutions for IoT modules offers the chance bring back advanced packaging manufacturing to Europe.

Advanced semiconductor packaging needs continuous improvement of the three crucial factors: performance, form factor, and cost / reliability.

Project Goals and Results

Increase in competitiveness and global market share of European semiconductor industry.

Accelerate the manufacturing uptake of new technologies and shorten the time-to-market.

Reinforce smart, sustainable economic growth for Europe and job creation in Europe.

Key Project Characteristics

The project was among the top 3 ranked proposals accepted in the call

Total project budget: 30 M€ - Funding: 7.2 M€ (EU - JTI ECSEL) + 5.5 M€ (National authorities)

28 partners from 9 European countries - Project runtime: 1 April 2017 - 31 March 2020

Fraunhofer ENAS leads the Work Package 'Integration Concepts, Design, Modelling & Simulation'.  On the engineering side, we will develop a new strategy for automated virtual prototyping and implement it with a universal scheme based on validated numerical simula­tions. The method will account for the aspects of manufacturability and reliability right in the design phase. It aims at providing 'right first time' design solutions for all future SiP prod­ucts based on the fan-out wafer level pack­aging (FO-WLP) technology according to the NANIUM Packaging Roadmap.