Simulation of pulsed electrochemical copper deposition in through silicon vias with high aspect ratio
Through silicon vias (TSVs) are of key interest for 3D integration, enabling higher device densities and performances. The research goal of project VEProSi is a simplified process for the electrochemical deposition (ECD) of metals within TSVs.
Plating of TSVs with high aspect ratios is still challenging. Expensive and polluting chemicals (additives) are currently used to improve the uniformity of deposited metal layers. An alternative approach is periodic pulse reverse plating. This process was modeled at Fraunhofer ENAS, based on the Nernst-Planck equation, solved with the finite element method for a large number of combinations of pulse parameters.
It could be shown that the uniformity of deposited layers can be improved even without the use of additives. However, there is a tradeoff between process time and uniformity. From the simulation results, clear guidelines for optimal pulse plating processes are derived.