Simulation of processes and equipment

Simulation of silicon epitaxy for 22 nm FD-SOI technology within the project MOMENTUM

Amount-of-substance fraction of HCl on the wafer surface in a single wafer reactor with lateral flow over the wafer (velocity direction of incoming reaction gases: blue arrows) and with wafer rotation (rotation direction: black arrow)
© Fraunhofer ENAS
Amount-of-substance fraction of HCl on the wafer surface in a single wafer reactor with lateral flow over the wafer (velocity direction of incoming reaction gases: blue arrows) and with wafer rotation (rotation direction: black arrow)

The 22 nm FD-SOI technology enables the production of microchips with high energy efficiency and low production costs. The reduction of variations during the production process poses a big challenge. In the project MOMENTUM, Fraunhofer ENAS investigates the reduction of process variabilities for epitaxial growth of silicon in the channel region as well as silicon and silicon-germanium in raised source drain (RSD) regions. For this purpose, different equipment for the silicon epitaxy is investigated using simulation methods. In the first case, the optimization of a multi wafer reactor for the channel epitaxy is realized. Causes for the thickness fluctuations between wafers were identified, experimentally verified and first optimizations delivered. Further optimizations are currently validated. In the second case, a single wafer reactor for the RSD epitaxy is simulated, at which the thickness variation over the wafer is investigated. To examine effects across length scales in more detail, we collaborate with the Center for Microtechnologies, which provides chemistry, growth, and diffusion models for epitaxy. In the project, which is funded by the Sächsische Aufbaubank (SAB), Fraunhofer ENAS cooperates with the chip manufacturer GLOBALFOUNDRIES.

Simulated temperature distribution on the wafer stack in the model of a batch reactor. a) 3D view
© Fraunhofer ENAS
Simulated temperature distribution on the wafer stack in the model of a batch reactor. a) 3D view
Simulated temperature distribution on the wafer stack in the model of a batch reactor. a) 2D view
© Fraunhofer ENAS
Simulated temperature distribution on the wafer stack in the model of a batch reactor. a) 2D view
Simulated temperature distribution on the wafer stack in the model of a batch reactor.
© Fraunhofer ENAS
Simulated temperature distribution on the wafer stack in the model of a batch reactor.