3D integration technologies and applications

Fraunhofer ENAS offers flexible in house TSV fabrication by using TiN, TaN and Cu filling by CVD and ECD as barriers materials on substrates up to 200 mm. Coarse and fine grinding as well as spin etching for Si, SiO2, glass and ceramics are available processes for wafer thinning. Also wafer planarization is operated on Si, SiO2, glass, ceramics, metals and nitrides.

Different wafer bonding technologies are investigated and offered. Aerosol-jet printing is adopted as a new technology for MEMS packaging. Functional materials like particle inks, polymers, etchants and paste-like fluids are deposited by this non-contact direct-writing technology. Electrical interconnects over topographic structures and surfaces can be printed. The technology is also used for chip and wafer bonding, 3D MID as well as metallization for various substrates.

Si-bulk interposer for MEMS and electronic integration are developed with an open and flexible design.