Back-End of Line

Interconnects for Micro and Nanoelectronics

Materials Research, Process Development and Integration for Micro and Nanoelectronics

 

In a nutshell

Increasing performance of electronic components, continuous downscaling towards nanometer features along with entirely new device concepts are calling for advanced materials and elaborate manufacturing processes.

The Department Back-End of Line is collaborating with the Center for Microtechnologies at Chemnitz University of Technology. Together we deliver solutions for materials and processes, as well as their integration for micro- and nanoelectronics. Among others the work concentrates on technologies such as Atomic Layer Deposition (ALD), Airgap approaches for Cu damascene metallization, and CVD of Carbon Nanotubes (CNT) for applications in interconnect systems of ICs.

 

Airgaps

  • Airgaps as ultra low-k dielectric
  • Use of sacrificial layers to generate airgaps
  • Well balanced electrical, thermal and mechanical behaviour
  • Individual process and technology optimization

 

Copper damascene metallization with low-k dielectrics

  • ALD of Cu seed layers for electrochemical Cu deposition
  • Ultra-thin diffusion barriers
  • Cu MOCVD for IC metallization and 3D integration
  • Integration of ultra low-k materials
  • Cleaning methods in using of low-k and ultra-low-k materials in the technology of 45 nm and below
  • Optimization of etch processes via in situ diagnostics, e.g. to minimize sidewall damages in using of porous ultra-low-k dielectrics
  • Chemical mechanical polishing (CMP)
  • Process and equipment simulation of PVD, CVD and CMP processes

 

Carbon nanotube based interconnects

  • CNTs as via and contact material in ICs
  • Preparation of multi-wall nanotubes on mono- and bimetallic catalysts
  • Characterization with SEM, TEM, Raman spectroscopy and XPS

 

Selected topics