The department System Packaging is mainly concerned with various technologies for micro- and nano structuring of substrates and for packaging. In addition to the standard wafer bonding methods such as silicon direct bonding, anodic bonding, eutectic bonding, adhesive bonding, and glass frit bonding, some other wafer bonding methods such as laser assisted bonding, low temperature and thermo-compression bonding are also examined and developed. All wafer bonding processes are characterized with their bonding quality, strength and tightness. Methods of analysis such as infrared imaging, ultrasound inspection, and scanning electron microscopy as well as Maszara Blade and Micro-Chevron-Test are applied in our group. We also perform resonant structures tightness test and helium leak test.

The packaging of sensor and actuator components includes die dicing, chip- and wire bonding, and implementing technologies for the integration of complex, miniaturized and intelligent systems. The possibilities of integration are abundant, ranging from the integration of hybrid components to application-specific substrate carriers, the monolithic integration of electronic, sensoric and actuatoric components on a silicon substrate, to the vertical integration, in which stacking takes place in the 3rd dimension on the chip and wafer level, taking into account the contacts and the functionality.

The following equipments are available in our clean room to develop the described processes and technologies for 4-inch to 8-inch wafers:

• Cleaning
• Pre-treatment / activation
• Grinding / CMP
• screen printer and spin- and spray coaters
• adjustment / alignment
• wafer-, chip-, and wire bonder
• wafer saw